UVM Verification Engineer (Remote)

We have a current opportunity for a UVM Verification Engineer. The position will be Remote (Or option to work in any of our client´s offices across Europe). For further information about this position please apply.

EVERY APPLICANT WILL BE CONTACTED WITH MORE DETAILS WITHIN THE SAME WORKING DAY.

Introduction


For this role we are looking for Verification Engineers who can contribute to all phases of the verification flow. This includes

• Ownership of a specific area of a CPU project ranging from unit-level testbench development through to the overall verification methodology for a CPU project.
• Responsibility for producing test plans and verification strategies.
• Planning, tracking and coordinating the tasks of you or your team to meet high quality goals at the planned time
• Ensuring the quality of the verification work done is of the expected standard
• Being part of verification improvement strategies across the group.
• Evaluating and determining causality of different issues throughout the verification process per project.
  

Essential Skills And Experience

• Experience of designing and implementing verification environments for complex RTL designs
• Well-versed in the use of hardware verification languages e.g. SystemVerilog or Specman 'e'
• Understanding of end-to-end verification processes, from test plan creation through to verification closure
• Ability to quickly understand and apply complex specification detail
• Understanding of the fundamentals of computer architecture, with an emphasis on pipelining, exception handling, memory systems
  

Desirable Skills And Experience

• Verification methodologies such as UVM
• Practical experience of working on microprocessor designs
• In-depth understanding of memory protection, memory translation, vector processing in CPUs, exception and interrupt handling.
• Understanding of constrained random stimulus, the goals and general usefulness of different types of coverage in hardware, as well as checking methodologies and behavioural functional models.
• Knowledge of assembly language, and/or C/C++
• In-depth technical reviewing of others' work