Senior IC Digital Verification Engineer
- Location Switzerland
- Job-type Full time
- Salary Negotiable
- Sector SemiConTech
- Reference PR/006393_1619537950
- Start date ASAP
We have a current opportunity for a Senior IC Digital Verification Engineer on a permanent basis. The position will be based in . For further information about this position please apply.
Our Client is known as one of the most innovative low power IC developers in the world. In the Wireless & Sensing BU, we are specialized in state-of-the-art low power RF SOC ICs. To support our growth, we are looking for a senior IC digital verification engineer to strengthen the digital team and verification methodology development in close collaboration with SW and analog/RF teams. We are looking for an experienced professional motivated to drive design, methodology and best practices with a direct effect on products quality and BU bottom line.
Your responsibilities include but are not limited to:
- Own and develop future proof verification strategy, review and improve existing environment
- Perform state-of-the-art ultra-low power digital design verification using UVM methodology (System Verilog). Build and reuse models, monitors and checkers
- Debug failures, fix testbench/model/checker issues, manage bug tracking, analyze and improve verification coverage, including requirement tracking
- Improve verification methodology and strategy to cut down the development time while maintaining strong validation quality
What our client offers:
- A role in a growing, dynamic and multi-cultural, multi-disciplinary team where everyone can make a difference
- The opportunity to bring your experience and ideas to the table
- A place to contribute to state-of-the-art and innovative IC verification methodology and tools
- Team atmosphere
- International work environment and traveling opportunities
- Competitive salaries and benefits
PROFILE
- Strong autonomy in his field, good communication skills, strong team player
- Ability to contribute to a multi-disciplinary team in a constructive and data-driven approach
- Min. Masters in electrical / electronic engineering
- At least 5-10 year experience in similar position and industry
- Used to work in multicultural, multi-site team environment
PROFESSIONAL REQUIREMENTS
- Proven track record in digital verification methodologies of integrated circuits including testbench architecture, script writing, scoreboard and coverage methodology
- Knowledge of all digital verification steps (RTL, gate level, formal verification)
- Knowledge of UVM methodology System Verilog (class approach) and VHDL
- Verifying SOCs using SystemVerilog, testbenches, checkers, models and tests
- Experience with HW/SW co-simulation
- Experience with mixed signal verification (analog/digital/SW)
Preferred / additional requirements:
- Wireless protocol knowledge (like BLE) is a strong plus
- Experience with Automotive is a strong plus
- High level modelling (C/SystemC/C++) and knowledge on agile SW methods is plus
- Solid python skills is a plus
LANGUAGES
- English oral & written is a must
- Any other language (e.g. French speaking) would be an asset