Senior Analog & Mixed-Signal Design Engineer
- Location Madrid
- Job-type Full time
- Salary Negotiable
- Sector SemiConTech
- Reference PR/009763_1632319346
We have a current opportunity for a Senior Analog & Mixed-Signal Design Engineer on a permanent basis. The position will be based in Madrid. For further information about this position please apply.
RESPONSABILITIES
- Specification of the analog and mixed-signal blocks that are embedded in the system (ADC, DAC, PLL, data interfaces, optoelectronics…).
- Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in sub-nanometric CMOS processes. It means been involved in the full AMS design flow: system-level design, schematic, layout, and full verification.
-Definition of layout guidelines for layout engineers and review of their work.
-Collaborate with the test engineers for the test definition of the fabricated ICs.
-Review and analysis of lab characterization data, for validation and correlation with simulation results.
-Cooperation with the rest of the team to define the characterization tests for the circuits in which the analog and mixed-signal blocks are integrated.
- Cooperate with the system-level engineers for the generation of models of analog and mixed-signal blocks for their use at system-level evaluation.
-Assistance on the integration of the complete analog subsystem to be used in complex mixed-signal design within integrated digital logic. This will include mixed-signal verification with digital processing.
-Research on new architectures and efficient solutions for the future products of the company and generation of new patents.
-Internal meeting presentation and documentation of the developed work.
REQUIREMENTS
-MSc/Ph.D. in Electronics, Electrical, Computer Engineering or relevant field.
-At least 5 years of experience in similar tasks.
DESIRABLE COMPETENCIES
Knowledge:
- Experience in delivering successful design in silicon: product definition, characterization, qualification, and productization.
- Experience in designing full-custom analog IP blocks in sub-nanometric CMOS technology (65nm/28nm or below), as well as with analog and mixed-signal IC EDA tools, such as Cadence or Synopsys.
-Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in sub-nanometric CMOS processes.
-Good knowledge of full-custom analog layout techniques, including the ability to manage and review the work of others.
-Excellent written and verbal English communication skills.
Personal profile:
-Dynamic person with motivation and taste for his work, analytical, organized, and with high personal motivation and ready to integrate into a young team.
